Syscall 2: Firmware, home

ShuffleChapter 11: Capstones

S42TOPSY TURVY

The task

Two signal processors, swapped about. Swaps stay inside a core.

P must receive 3X minus 4Y, and Q 4X plus 3Y: the point X, Y turned and stretched.

u reads X and v reads Y, and they trade values over one wire.

The board

The board of TOPSY TURVY2 cores: u and v. Inputs X and Y; outputs P and Q.uSC-2D 10 LINESvSC-2D 10 LINESP0P1P2P0P1P2XYPQ
The board as the puzzle screen lays it out. Cyan pins read, lemon pins write, violet pins go both ways. On a narrow screen, scroll the board sideways to see all of it.

Key idea

Par is 8 swaps. Core u needs 2 instruction swaps and 3 operand swaps; core v needs 1 instruction swap and 2 operand swaps. 6 of them trade two tiles that hold each other's places; look for those first, since one swap mends both.

Hints

Each hint goes a step further than the one before. Open them one at a time.

Hint 1Show

u sends X first and then reads Y. v reads X first and then sends Y.

Hint 2Show

Each core works out its own value's share before it reads the other, and keeps it in B.

Hint 3Show

The only minus is on Y's share of P.

Solution

Reveal the Full SolutionThe complete program for TOPSY TURVY. Open it only when you want the answer.

The board as dealt

This is the arrangement the game deals. Framed tiles are the ones out of place.

uSC-2D signal processor

MUL P0
OUT A
OUT 3
MOV -4, P1
IN B
MUL P1
ADD B
IN P2

vSC-2D signal processor

IN P1
MUL 4
MOV B, P2
IN P0
OUT P1
OUT B
ADD 3
MUL A

8 swaps back

Make these swaps in order. Lines are numbered from 1 in each core.

  1. In core u, swap the operand A on line 2 with P1 on line 4.
  2. In core u, swap the operand -4 on line 4 with B on line 5.
  3. In core u, swap the operand -4 on line 5 with P1 on line 6.
  4. In core u, swap the instruction MUL on line 1 with IN on line 8.
  5. In core u, swap the instruction OUT on line 3 with MUL on line 8.
  6. In core v, swap the operand P2 on line 3 with A on line 8.
  7. In core v, swap the operand B on line 6 with 3 on line 7.
  8. In core v, swap the instruction OUT on line 6 with MUL on line 8.

The finished program

Every tile back in place: the reference solution, which scores exactly par on every benchmark.

uSC-2D signal processor

IN P0
OUT P1
MUL 3
MOV B, A
IN P1
MUL -4
ADD B
OUT P2

vSC-2D signal processor

IN P1
MUL 4
MOV B, A
IN P0
OUT P1
MUL 3
ADD B
OUT P2
CYCLES
469
at par
ENERGY
3744
at par
NODES
2
at par
INSTRUCTIONS
16
at par
SWAPS
8
at par