Syscall 2: Firmware, home

SignalChapter 11: Capstones

90EXCHANGE

The task

X carries packets: a header of 10 times a port plus a count, then that many numbers.

P, Q, and R are ports 1 to 3. Each gets its numbers, then each packet's sum MOD 100.

s is an SC-4, with C and D. t1 is an SC-2D, 3 cycles a jump; t2 an SC-2L, 2 cycles a line.

The board

The board of EXCHANGE5 cores: a, s, t1, t2, and t3. Inputs X; outputs P, Q, and R.aSC-2 15 LINESsSC-4 15 LINESt1SC-2D 10 LINESt2SC-2L 15 LINESt3SC-2 15 LINESP0P1P0P1P2P3P0P1P0P1P0P1XPQR
The board as the puzzle screen lays it out. Cyan pins read, lemon pins write, violet pins go both ways. On a narrow screen, scroll the board sideways to see all of it.

Key idea

A packet router: DIV 10 and MOD 10 split a header, JRX B keeps the port as a jump, and each port core sends its packet's sum MOD 100.

Hints

Each hint goes a step further than the one before. Open them one at a time.

Hint 1Show

DIV 10 and MOD 10 split a header into its port and its count.

Hint 2Show

JRX C jumps from its own line by C, so s can keep a jump for the port in C on this SC-4.

Hint 3Show

a can mark the end of each packet, so t1, t2, and t3 know when to send the sum.

Solution

Reveal the Full SolutionThe complete program for EXCHANGE. Open it only when you want the answer.

The reference program

The game's own solution. It passes every test and scores exactly par on every benchmark.

aSC-2 standard

S: IN P0
MOV B, A
DIV 10
NEG
OUT P1
MOV A, B
MOD 10
MOV B, A
L: IN P0
OUT P1
MOV A, B
SUB 1
MOV B, A
JG L
OUT P1

sSC-4 quad

L: IN P0
JL H
JRX C
OUT P1
JMP L
OUT P2
JMP L
OUT P3
JMP L
H: NEG
ADD A
SUB 1
MOV C, A

t1SC-2D signal processor

L: IN P0
JNZ K
XCH A, B
MOD 100
OUT P1
JMP L
K: OUT P1
ADD B
MOV B, A

t2SC-2L low power

L: IN P0
JNZ K
XCH A, B
MOD 100
OUT P1
JMP L
K: OUT P1
ADD B
MOV B, A

t3SC-2 standard

L: IN P0
JNZ K
XCH A, B
MOD 100
OUT P1
JMP L
K: OUT P1
ADD B
MOV B, A
CYCLES
367
at par
ENERGY
4811
at par
NODES
5
at par
INSTRUCTIONS
55
at par

Another way: Exchange port on s

A second program that also passes. It beats par on ENERGY and INSTRUCTIONS and gives some back on CYCLES.

Less energy and fewer instructions than par, but slower. a sends the whole header negated, and s works out the port itself.

aSC-2 standard

IN P0
NEG
OUT P1
NEG
MOD 10
MOV B, A
L: IN P0
OUT P1
MOV A, B
SUB 1
MOV B, A
JG L
OUT P1

sSC-4 quad

L: IN P0
JL H
JRX B
OUT P1
JMP L
OUT P2
JMP L
OUT P3
JMP L
H: NEG
DIV 10
ADD A
SUB 1
MOV B, A

t1SC-2D signal processor

L: IN P0
JNZ K
XCH A, B
MOD 100
OUT P1
JMP L
K: OUT P1
ADD B
MOV B, A

t2SC-2L low power

L: IN P0
JNZ K
XCH A, B
MOD 100
OUT P1
JMP L
K: OUT P1
ADD B
MOV B, A

t3SC-2 standard

L: IN P0
JNZ K
XCH A, B
MOD 100
OUT P1
JMP L
K: OUT P1
ADD B
MOV B, A
CYCLES
373
over par
ENERGY
4780
under par
NODES
5
at par
INSTRUCTIONS
54
under par